Title:
SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREFOR
Document Type and Number:
WIPO Patent Application WO/2024/045261
Kind Code:
A1
Abstract:
The present disclosure relates to a semiconductor structure and a preparation method therefor. The semiconductor structure comprises: a substrate (1), and a gate trench (31) located in the substrate (1); and a gate dielectric layer, which comprises a first oxide layer (34), a barrier layer (35) and a second oxide layer (36), wherein the second oxide layer (36) covers a side wall and the bottom of the gate trench (31), the barrier layer (35) covers a side wall of the second oxide layer (36), and the first oxide layer (34) covers the surface of the barrier layer (35) and covers the surface, which is located at the bottom of the gate trench (31), of the second oxide layer (36).
Inventors:
ZHAO CHUNLEI (CN)
LU YONG (CN)
XU YACHAO (CN)
ZHANG RUIQI (CN)
LU YONG (CN)
XU YACHAO (CN)
ZHANG RUIQI (CN)
Application Number:
PCT/CN2022/123931
Publication Date:
March 07, 2024
Filing Date:
October 09, 2022
Export Citation:
Assignee:
CHANGXIN MEMORY TECH INC (CN)
International Classes:
H01L29/06
Foreign References:
| CN111063722A | 2020-04-24 | |||
| CN114156236A | 2022-03-08 | |||
| CN102163576A | 2011-08-24 | |||
| CN103928326A | 2014-07-16 | |||
| CN114141714A | 2022-03-04 | |||
| US20170236836A1 | 2017-08-17 |
Attorney, Agent or Firm:
ADVANCE CHINA IP LAW OFFICE (CN)
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