Title:
STACKED TYPE SEMICONDUCTOR DEVICE AND PRINTED CIRCUIT BOARD
Document Type and Number:
WIPO Patent Application WO/2013/051247
Kind Code:
A1
Abstract:
The printed circuit board (100) includes the interposer (2) where the semiconductor element (1) is mounted and the electrode pad (8) is formed on one surface, the printed wiring board (3) where the electrode pad (9) is formed on one surface facing the interposer (2), and the joint material (70) for bonding the electrode pads (8) and (9). The joint material (70) includes the solder layer (60) formed by the solder material (11) and the metal layers (50), (50) provided to the electrode pads (8) and (9). Each metal layer (50) includes the metal particle aggregate (10) in which metal particles are integrated with voids and is formed by filling the voids in the metal particle aggregate (10) with melted solder material (11). It is possible to ensure the height of the solder, improve reliability of the bonding, and downsize the semiconductor device by using such joint material.
Inventors:
FUJISAWA YOSHITOMO (JP)
Application Number:
PCT/JP2012/006328
Publication Date:
April 11, 2013
Filing Date:
October 03, 2012
Export Citation:
Assignee:
CANON KK (JP)
International Classes:
H01L21/48; H01L23/498
Foreign References:
| US20110156271A1 | 2011-06-30 | |||
| US20060163744A1 | 2006-07-27 | |||
| US20100213609A1 | 2010-08-26 | |||
| US20100295177A1 | 2010-11-25 | |||
| US6013713A | 2000-01-11 | |||
| US20080145607A1 | 2008-06-19 | |||
| JP2008235378A | 2008-10-02 |
Other References:
QIANG YU; MASAKI SHIRATORI: "Effects of BGA Solder Geometry on Fatigue Life and Reliability Assessment", JOURNAL OF JAPAN INSTITUTE OF ELECTRONICS PACKAGING, vol. 1, no. 4, 1998, pages 278 - 283
Attorney, Agent or Firm:
ABE, Takuma et al. (30-2 Shimomaruko 3-chome, Ohta-k, Tokyo 01, JP)
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Claims:
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