Title:
集積回路中に浅い絶縁領域を形成する製造方法とその製造方法によって形成された集積回路
Document Type and Number:
Japanese Patent JP2004507110
Kind Code:
A
Abstract:
The formation of the isolating region includes ion implantation in the voluminal part, followed by annealing of said implanted voluminal part (7) of the substrate (1).
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Inventors:
Maindelt, M. Lunenborg
Walter, Jay A. De, Coster
Align, Inaldo
Frank, Arnaud
Walter, Jay A. De, Coster
Align, Inaldo
Frank, Arnaud
Application Number:
JP2002521354A
Publication Date:
March 04, 2004
Filing Date:
August 10, 2001
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
STMicroelectronics S.A.
STMicroelectronics S.A.
International Classes:
H01L21/76; H01L21/762; H01L27/08; (IPC1-7): H01L21/76; H01L27/08
Domestic Patent References:
| JPH0846026A | 1996-02-16 | |||
| JPH10144678A | 1998-05-29 | |||
| JPH10135323A | 1998-05-22 | |||
| JPH0590401A | 1993-04-09 |
Foreign References:
| US5976952A | 1999-11-02 | |||
| US5733813A | 1998-03-31 | |||
| US6027984A | 2000-02-22 | |||
| DE19919406C | ||||
| US6001709A | 1999-12-14 |
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki