Title:
データ転送機構
Document Type and Number:
Japanese Patent JP4784954
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To allow the data transfer mechanism to have only one line memory used for transferring data to a resolution conversion part and to reduce the quantity of power consumption and manufacture cost. SOLUTION: A data transfer mechanism is provided with a main memory 2 storing image data, a line memory 5 outputting pixel data of a second input line to the resolution conversion part 6 and a DMA(direct memory access) controller 3 which DMA-transfers picture data of the first input line from the main memory 2. A selector 4 is controlled to select pixel data which are transmitted from the DMA controller 3 and inputted to a '0' side terminal or pixel data which are fed back from the line memory 5 and inputted to the '1' side terminal in accordance with the level of a line signal SLN inputted from the resolution conversion part 6 and to output it to the line memory 5. The DMA controller 3 is controlled to repetitively transfer pixel data of the same line or to transfer pixel data of the next line in accordance with the level of a line signal SLN.
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Inventors:
Kazuya Morimoto
Hajime Sasaki
Hajime Sasaki
Application Number:
JP2001050033A
Publication Date:
October 05, 2011
Filing Date:
February 26, 2001
Export Citation:
Assignee:
Mega Chips Co., Ltd.
International Classes:
G06F13/28; G09G5/00; G09G5/36; H04N1/387
Domestic Patent References:
| JP11196280A | ||||
| JP63173120A | ||||
| JP5236345A | ||||
| JP2001024924A |
Attorney, Agent or Firm:
Yoshitake Hidetoshi
Takahiro Arita
Takahiro Arita