Title:
MAXIMUM PERIODICAL SYSTEM CODE GENERATION CIRCUIT
Document Type and Number:
Japanese Patent JP2968629
Kind Code:
B2
Abstract:
PURPOSE: To drastically reduce a circuitry according to the increment of desired code class by generating the maximum number of periodical system codes less than (n) stages by supplying coefficients for them by shift registers of (n) stages and combination circuits in the periphery of them.
CONSTITUTION: Coefficients of generating function of codes desired to generate are inputted to X0 to X15 of a generating function coefficient input terminal 1 consisting of (n+1) external input terminals. At this time, the coefficient of Xi of mth-order generating function is inputted to X15. A combination circuit 3 is provided with a function of yi=yi-1+Xi-1(i=1, 2,...15,Yo=0) setting X0-X14 of the input terminal 1 as input, and Y1-Y15 are outputted, and the output of the circuit 3 are shown as Y0-Y7='0', and Y8-Y15 as '1'. The output is inputted to a register 20, and input is selected via an FF 201 when selector control input shows '1', and when it shows '0', a signal directly inputted to a selector 202 is selected. Therefore, the circuit 3 can obtain the maximum number of periodical system codes out of (n) stages according to the mth-order generating function.
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Inventors:
MASAYANAGI HIROYUKI
KOBAYASHI TAKAMASA
KOBAYASHI TAKAMASA
Application Number:
JP34415291A
Publication Date:
October 25, 1999
Filing Date:
December 03, 1991
Export Citation:
Assignee:
NIPPON DENKI KK
MYAGI NIPPON DENKI KK
MYAGI NIPPON DENKI KK
International Classes:
H03K3/84; (IPC1-7): H03K3/84
Domestic Patent References:
| JP563522A |
Attorney, Agent or Firm:
Masaki Yamakawa
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