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Title:
MEMORY CIRCUIT
Document Type and Number:
Japanese Patent JPS5647989
Kind Code:
A
Abstract:

PURPOSE: To quicken the judgement of the level change of the data line of RAM, by fixing the precharge level of the data line.

CONSTITUTION: When trasnsfer gates 3 and 4 are opened with precharge clock p, a voltage rise across data line D according to current supply from electric power source VDD approximates to the logical threshold level of sense amplifier 1 through feedback transistor 5 connecting gate 4. Therefore, data of RAM appearing on line D according to an address clock after precharge reaches the threshold level even if the level of line D changes slightly, which is judged by amplifier 1 in a short time after addressing. As a result, the data processing of RAM can be quickened.


Inventors:
TERAWAKI SHINJI
Application Number:
JP12224779A
Publication Date:
April 30, 1981
Filing Date:
September 21, 1979
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
G11C11/409; G11C11/4094; (IPC1-7): G11C11/34
Domestic Patent References:
JPS5362433A1978-06-03



 
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