Title:
METHOD FOR MANUFACTURING THIN FILM TRANSISTOR PANEL
Document Type and Number:
Japanese Patent JP2003031780
Kind Code:
A
Abstract:
To provide a new method and apparatus for manufacturing a thin layer transistor panel having a high performance and high reliability.
The method for manufacturing the thin film transistor panel comprises the steps of providing a silicon base (10), forming a transparent insulator (12) on a front surface of the silicon base, forming a plurality of thin film transistor structures (14) and corresponding plurality of transparent electrodes (18) on the insulator, connecting the base (30) to the front surface of the base, removing the base, and etching the insulator to at least expose the electrodes.
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Inventors:
DAI YUAN-TUNG
LEE CHI-SHEN
CHANG JIUN-JYE
LEE CHI-SHEN
CHANG JIUN-JYE
Application Number:
JP2002023726A
Publication Date:
January 31, 2003
Filing Date:
January 31, 2002
Export Citation:
Assignee:
IND TECH RES INST
International Classes:
G02F1/1368; H01L21/02; H01L21/336; H01L21/77; H01L21/84; H01L27/12; H01L29/786; (IPC1-7): H01L27/12; G02F1/1368; H01L21/336; H01L29/786
Domestic Patent References:
JPH01181570A | 1989-07-19 | |||
JPH04178633A | 1992-06-25 | |||
JPH06504139A | 1994-05-12 | |||
JPH06273797A | 1994-09-30 | |||
JPH07321298A | 1995-12-08 | |||
JPH0829807A | 1996-02-02 | |||
JPH10189534A | 1998-07-21 | |||
JPH06167719A | 1994-06-14 | |||
JPH02154232A | 1990-06-13 | |||
JPH05267563A | 1993-10-15 | |||
JPH04259249A | 1992-09-14 |
Attorney, Agent or Firm:
Takashi Ishida (4 others)
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