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Patent Searching and Data


Title:
MICROPROGRAM CONTROLLER
Document Type and Number:
Japanese Patent JPS61240340
Kind Code:
A
Abstract:

PURPOSE: To improve the debugging efficiency of a microprogram by designating an optional address and an optional frequency N and stopping automatically the execution of the microprogram after the instruction of said address is executed by N times.

CONSTITUTION: A microprogram μPG stored in a control storage 1 is read out by a control storage address sent via a line 310 and sent to an execution control part 3 via an instruction register RG2 for execution. The part 3 sends the address to be executed next to the storage 1 via the line 310. The address of an instruction to which a temporary stop is desired is stored in a comparison address RG5 from a console. The executing frequency N of said address instruction counted before stoppage is sent to a stop signal generating circuit 7. When coincidence is detected by a coincidence detecting circuit 6 between an address given from the RG5 and that sent from the part 3, the circuit 6 sends a detection signal to the circuit 7 each time. The circuit 7 sends a signal to the part 3 when the frequency of the coincidence detecting signals sent from the circuit 6 reaches the frequency N designated by the console. Thus the execution of the μPG is stopped.


Inventors:
ITO MASARU
Application Number:
JP8276685A
Publication Date:
October 25, 1986
Filing Date:
April 18, 1985
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F11/28; G06F9/22; G06F11/36; (IPC1-7): G06F9/22; G06F11/28
Attorney, Agent or Firm:
Uchihara Shin