To provide a semiconductor chip stack package with a reinforcing member for preventing a warpage, in which the reinforcing member is connected to a substrate.
The semiconductor chip stack package includes: a first substrate with first circuit patterns on one surface of the substrate; a first unit semiconductor chip provided with a plurality of semiconductor chips stacked vertically on the first substrate, each of the semiconductor chips having first connection pads electrically connected to the first circuit patterns of the first substrate on one surface of the semiconductor chip; and a first reinforcing member arranged over the first unit semiconductor chip, the first reinforcing member having first circuit patterns on one surface of the first unit semiconductor chip. The uppermost semiconductor chip of the first unit semiconductor chip further has first subsidiary connection pads connected to the first connection pads. The first circuit patterns of the first reinforcing member are electrically connected to the first circuit patterns of the first substrate via the first subsidiary connection pads of the uppermost semiconductor chip.
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro