Title:
SEMICONDUCTOR MEMORY
Document Type and Number:
Japanese Patent JPH04162300
Kind Code:
A
Abstract:
PURPOSE: To accurately read stored data of a PROM even if an error correction data is not written by externally controlling the function of an error corrector contained therein.
CONSTITUTION: An error correction control register 1, a PROM 2, an error correction data storage PROM 3, an error corrector 4 are provided. If an error occurs in data of the PROM 2 corresponding to the input of the data of the PROM 2 and the data of the PROM 3 in the corrector 4, the data of the PROM 2 is corrected. When the data of the PROM 3 is undecided, information for invalidating the correcting function of the corrector 4 is previously written in the register 1. Thus, it is not necessary to externally write the correction data.
More Like This:
JP2008182252 | VERTICAL ELECTRICAL INTERCONNECTIONS IN STACK |
JPS59210663 | SEMICONDUCTOR MEMORY DEVICE |
JPS5558559 | SEMICONDUCTOR DEVICE |
Inventors:
HENMI TORU
Application Number:
JP28890590A
Publication Date:
June 05, 1992
Filing Date:
October 26, 1990
Export Citation:
Assignee:
NEC CORP
International Classes:
H01L27/10; G06F11/10; G06F11/36; G11C29/00; G11C29/42; (IPC1-7): G11C29/00; H01L27/10
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)