Title:
SYNCHRONIZING SIGNAL GENERATOR
Document Type and Number:
Japanese Patent JPS5436124
Kind Code:
A
Abstract:
PURPOSE: To prevent jitter due to the phase matching between the clock and reset from being taken place, by using the clocks having different phases with selection, in the synchronizing signal generator generating the synchronizing signal by the counter.
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Inventors:
ISHIMARU NOBUYUKI
Application Number:
JP10174677A
Publication Date:
March 16, 1979
Filing Date:
August 26, 1977
Export Citation:
Assignee:
HITACHI ELECTRONICS
International Classes:
H04N5/073; H04N5/06; (IPC1-7): H04N5/06