PURPOSE: To obtain a simpel PLL circuit which uses no arithmetic amplifier by applying the low-pass filter (LPF) output of a main loop and the LPF output of a secondary loop to both ends of a variable capacity diode connected in series or parallel to a crystal oscillator.
CONSTITUTION: An input signal ein is compared with the output of a voltage control oscillator 4 by phase comparators 1a and 1b and delivered to LPFs 2a and 2b in the form of error outputs a and b respectively. The outputs Ea and Eb of the LPFs 2a and 2b are applied to both ends of a variable capacity diode 40 connected in series to a crystal oscillator 41. Thus the diode 40 is controlled by the differential voltage. As a result, the oscillation frequency and the phase of the oscillator 4 are controlled by the differential voltage between outputs of both comparators.
JP3120602 | [Title of Invention] Digital Receiver |
JPH0258932 | TRANSMITTING CIRCUIT |
JPH0211021 | FILTER CIRCUIT |
OGISO MASAAKI
JPS58107727A | 1983-06-27 |