Title:
垂直選択トランジスタを含むメモリーセルを備えた半導体メモリー、および、その製造方法
Document Type and Number:
Japanese Patent JP2005504440
Kind Code:
A
Abstract:
In order to fabricate a semiconductor memory, a trench capacitor is arranged in a first trench. Beside the first trench, a first longitudinal trench and, parallel on the other side of the first trench, a second longitudinal trench are arranged in the substrate. A first spacer word line is arranged in the first longitudinal trench and a second spacer word line is arranged in the second longitudinal trench. There are arranged in the first trench connecting webs between the first spacer word line and the second spacer word line which have a thickness which, in the direction of the first spacer word line, is less than half the width of the first trench in the direction of the first spacer word line.
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Inventors:
Rutzen, Youn
Goebel, Bernd
Schumann, Dirk
Martin Goose
Seidle, Harlart
Pop, martin
Kersch, Alfred
Steinhagle, Werner
Goebel, Bernd
Schumann, Dirk
Martin Goose
Seidle, Harlart
Pop, martin
Kersch, Alfred
Steinhagle, Werner
Application Number:
JP2003531529A
Publication Date:
February 10, 2005
Filing Date:
August 14, 2002
Export Citation:
Assignee:
Infineon Technologies AG
International Classes:
H01L21/8242; H01L27/108; (IPC1-7): H01L21/8242; H01L27/108
Attorney, Agent or Firm:
Kenzo Hara
Ryuichi Kijima
Ichiro Kaneko
Ryuichi Kijima
Ichiro Kaneko