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Title:
STACKED PACKAGE USING STEPPED CAVITY SUBSTRATE AND METHOD FOR MANUFACTURING SAME
Document Type and Number:
WIPO Patent Application WO/2021/261940
Kind Code:
A1
Abstract:
A stacked package comprises: a core insulation layer comprising a lower cavity therein; a first upper circuit pattern layer and a first lower circuit pattern layer arranged on the upper surface and the lower surface of the core insulation layer, respectively; a first upper insulation layer which is arranged on the upper surface of the core insulation layer so as to cover the first upper circuit pattern layer, and which has an upper cavity therein for exposing a portion of the lower cavity and the core insulation layer; a first lower insulation layer which is on the lower surface of the core insulation layer and covers the first lower circuit pattern layer; a first chip arranged inside the lower cavity and having a first chip pad; and a second chip arranged inside the upper cavity, above the first chip and having a second chip pad and a second chip substrate splicing pad.

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Inventors:
KIM HYUN HO (KR)
YOU MUN SANG (KR)
LEE JONG TAE (KR)
Application Number:
PCT/KR2021/007966
Publication Date:
December 30, 2021
Filing Date:
June 24, 2021
Export Citation:
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Assignee:
SIMMTECH CO LTD (KR)
KIM HYUN HO (KR)
International Classes:
H01L23/495; H01L23/00; H01L23/498
Foreign References:
KR20140077339A2014-06-24
KR101486420B12015-01-26
US20190189589A12019-06-20
KR20190110901A2019-10-01
JP5671606B22015-02-18
Attorney, Agent or Firm:
AJU INTERNATIONAL LAW & PATENT GROUP (KR)
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