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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JP2022139144
Kind Code:
A
Abstract:
To provide a technique that can hold the withstanding voltage in a peripheral region.SOLUTION: A semiconductor device (10, 100) includes a semiconductor substrate (12), an upper electrode (70) in contact with an upper surface (12a) of the semiconductor substrate, a lower electrode (72) in contact with a lower surface (12b) of the semiconductor substrate, and an insulating film (46). The semiconductor substrate includes an element region (60) that overlaps with a contact surface between the upper electrode and the semiconductor substrate when the semiconductor substrate is viewed from above, and a peripheral region (62) disposed around the element region. The insulating film (46) covers the upper surface of the semiconductor substrate in the peripheral region. The peripheral region includes a surface layer n-type region (40) in contact with the insulating film, a plurality of p-type withstanding voltage holding regions (42) circumscribing the element region and in contact with the surface layer n-type region from below, and an n-type drift region (34) in contact with the surface layer n-type region and the withstanding voltage holding regions from below.SELECTED DRAWING: Figure 2

Inventors:
HIRABAYASHI YASUHIRO
Application Number:
JP2021039401A
Publication Date:
September 26, 2022
Filing Date:
March 11, 2021
Export Citation:
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Assignee:
DENSO CORP
International Classes:
H01L29/78; H01L21/336; H01L29/06; H01L29/12; H01L29/739
Attorney, Agent or Firm:
Patent Attorney Corporation Kaiyu International Patent Office