Title:
SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JP3272000
Kind Code:
B2
Abstract:
PURPOSE: To form a video signal corresponding to an optional television(TV) system.
CONSTITUTION: When this signal processor correspond to NTSC and PAL systems, 4 fsc and 16 fsc/5 are used as the sampling frequency fs of a Y signal. A timing generator 10 generates the sampling frequency fs, sampling frequency fs/4 for color difference signals R-Y, B-Y, a shift clock fSHIFT, and balance modulating carrier frequency 4fsc and the shift clock fSIFT are set up to fsc/4 and fsc/5 corresponding to the NTSC and PAL systems. At the time of correspondence to the PAL system, the timing generator 10 locks the phases of respective output signals outputted from an oscillator and a voltage control oscillator by a PLL circuit and registers 33, 34 shift respective digital collor difference signals R-Y, B-Y based upon the shift clock fSHIFT outputted from the generator 10 and supply the shifted signals to a digital balance modulator 40.
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Inventors:
Yuji Eiki
Application Number:
JP20627691A
Publication Date:
April 08, 2002
Filing Date:
July 23, 1991
Export Citation:
Assignee:
Canon Inc
International Classes:
H04N9/64; H04N9/65; (IPC1-7): H04N9/65; H04N9/64
Domestic Patent References:
| JP56107682A | ||||
| JP62117490A |
Attorney, Agent or Firm:
Toshihiko Watanabe